Position Latch with Macro Programs

Valid for S300, S700

Parameterisation

For input 1:  IN1MODE=26
For input 2:  IN2MODE=26

This activates the functions in principle.

Latch Enable/Disable from within the macro program

Enable of the individual edges :

To use enable/disable Latch  a bit must be set in DRVCNFG2:

DRVCNFG2 = 0x02 (bit 1) for input 1
DRVCNFG2 = 0x04 (bit 2) for input 2

If  enable/disable is not activated, every individual edge is acquired and the position latched last is adopted.

ENAL1P=1 , enable for input 1, positive edge
ENAL1N=1 , enable for input 1, negative edge
ENAL2P=1 , enable for input 2, positive edge
ENAL2N=1 , enable for input 2, negative edge

ENAL1P=0 , disable for input 1, positive edge
ENAL1N=0 , disable for input 1, negative edge
ENAL2P=0 , disable for input 2, positive edge
ENAL2N=0 , disable for input 2, negative edge

If enable/disable is activated, then enable (e.g. ENAL1P ) is automatically set to 0 after every latch process.
The next latching must be reactivated from within the macro program (e.g. ENAL1P:=1).

Information about executed latching

INPUT1 positive edge
Bit 0X2000000=1 in TRJSTAT,  LATCH1P32 – Position
INPUT1 negative edge
Bit 0X4000000=1 in TRJSTAT,  LATCH1N32 – Position

INPUT2:  positive edge
Bit 0X100000=1 in TRJSTAT, LATCH2P32 – Position
INPUT2: negative edge
Bit 0X800000=1 in TRJSTAT, LATCH2N32 – Position

The position always refers to the PFB position controller position.
In addition, the PRD position is also latched (only the upper 16 bits). It is located in the variables LATCH1P16/LATCH1N16, etc.

After the positions have been evaluated, the status bits should be set to 0 (e.g. TRJSTATC:=0x2000000) in order to wait for the next latch process.