This article discusses common questions about the differences between AKD and AKD2G drives. A PDF version of these questions is attached below. More information can be found in the online help under the topic AKD2G vs. AKD.
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The S200 updated boards use a larger FPGA with multiple feedback and filter options. Two new parameters have been introduced to select/set these options. These parameters allow the updated boards to use a single FPGA control logic release (LogicVer = 4/VerLW = 4.xx) to replace multiple control logic versions used in original S200 units with old FPGA (LogicVer = 3/VerLW = 3.xx) up to 2021.
This article discusses AKD EtherCAT scaling for velocity, acceleration, and deceleration commands and actual velocity. For the position modes, FBUS.PARAM05 applies to position scaling and the scaling for velocity, acceleration, and deceleration.
PP = Profile Position
IP = Interpolated Position
CSP = Cyclic Synchronous Position
PV = Profile Velocity
The AKD drive supports flexible EtherCAT PDO mapping. The 4 available flexible RxPDO’s (PDO data for receive direction, commands from master to drive) are mapped using objects 1600h, 1601h, 1602h, and 1603h. Each one of these RxPDOs is limited to a maximum size of 8 bytes, but historically the sum total size for all four RxPDOs was limited to 20 bytes. This sum total size for all four RxPDOs was changed in firmware version 1-16-00-002 to 32 bytes, dependent on setting ECAT.LEGACYREV=0.
TxPDO’s have always supported 32 byte of data